1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device capable of preventing the breakdown of an insulating film formed on a semiconductor substrate in the manufacturing process of the semiconductor device and thereby manufacturing a highly reliable semiconductor device with a high yield.
2. Description of the Related Art
As semiconductor integrated circuits such as LSI become smaller in size, efforts to make elements smaller are attempted. Such efforts involve, for example, forming a shallower impurity diffusion layer serving as a source-drain region with a smaller area and forming narrower wirings connecting elements. Subsequently, electric resistances of the impurity diffusion layer and wiring increase, which adversely influences or hampers the high-speed operation of elements. To avoid this, in the conventional semiconductor device, a high melting point metal silicide layer is formed on the surface of the impurity diffusion layer so as to decrease the resistance of the impurity diffusion layer and thereby to increase the operation speed of the elements. An example of a semiconductor device intended to increase operation speed of element is a semiconductor device using a Ti silicide layer (U.S. Pat. No. 4,855,798).
FIGS. 1A through 1D are cross-sectional views in the order of manufacturing steps showing a method of manufacturing a conventional semiconductor device intended to increase operation speed by using a Ti silicide layer. As shown in FIG. 1A, an element separation film 11 consisting of an insulating film is selectively formed on the surface of a semiconductor substrate 20 thereby to demarcate an element region. Next, an oxide film (not shown) and a polysilicon film (not shown) are sequentially formed on the surface of the element region. Thereafter, the oxide film and the polysilicon film are patterned into a gate shape by lithography and dry etching, thereby forming a gate oxide film 14 consisting of the oxide film and a gate electrode 13 consisting of the polysilicon film. An oxide film (not shown) is then formed on the entire surfaces thereof and etched back, thereby forming a sidewall insulating film 12 consisting of the remaining oxide film on the sidewall of the gate electrode 13. After that, ions are implanted from above and heat treatment is conducted to the substrate 20, thereby to selectively form a diffusion layer 15.
A natural oxide film (not shown) formed on the gate electrode 13 and the diffusion layer 15 is then removed by wet etching using dilute hydrofluoric acid and the like. As shown in FIG. 1B, a Ti film 19b of about 300 .ANG. in thickness is formed thereon.
As shown in FIG. 1C, heat treatment is conducted to the substrate and a Ti silicide layer 17 of C49 layer consisting of high resistance TiSi.sub.2 is formed in a region in which the Ti film 19b and the gate electrode 13 contact with each other and a region in which the Ti film 19b and the diffusion layer 15 contact with each other in a self-aligned manner manner (see FIG. 1B). Since the heat treatment is conducted under nitrogen atmosphere, a TiN layer 18 of about several tens .ANG. in thickness is formed on the surface of the unreacted Ti film 19c.
Next, as shown in FIG. 1D, the unreacted Ti film 19c and TiN film 18 on the element separation film 11 and on the sidewall insulating film 12 are removed. Heat treatment is then conducted to the substrate under nitrogen atmosphere, thereby transferring the high resistance Ti silicide film 17 to a Ti silicide layer of C54 film consisting of low resistance TiSi.sub.2. Thus, in the conventional semiconductor device, the resistance of the surface of the diffusion layer 15 is decreased in an effort to increase the operation speed of elements.
If a semiconductor device is manufactured by the manufacturing method illustrated in FIGS. 1A through 1D, the following problems arise. During a sputtering process, secondary electrons contained in plasma and the like may pass through the Ti film 19b to the gate oxide film 14 and flow into the substrate 20. If an electric current flows between the Ti film 19b and the substrate 20, the dielectric breakdown of the gate oxide film 14 occurs thereby to cause withstand voltage failure. Due to this, the reliability of the semiconductor device greatly deteriorates and the manufacturing yield of the semiconductor device is lowered.
As a way to prevent the breakdown of the gate oxide film 14 charged with secondary electrons, there has been proposed a method of forming a Ti film not by normal sputtering but by collimate sputtering. FIG. 2 is a typical view showing the normal sputtering method using a DC magnetron. FIG. 3 is a typical view showing the collimate sputtering method. As shown in FIGS. 2 and 3, a target 31 is provided in a sputtering unit (not shown) and a cathode magnet 36 is provided above the target 31. A substrate 33 is disposed on a stage 34 provided below the target 31. Thereafter, plasma 32 is generated between the substrate 33 and the target 31 and a Ti film is formed on the substrate 33. The Ti film formation method is applied to both the normal sputtering and the collimate sputtering.
However, as shown in FIG. 2, if the normal sputtering method is employed, the plasma 32 is generated right above the substrate 33. Due to this, secondary electrons tend to fly into the substrate 33. In the collimate sputtering method shown in FIG. 3, by contrast, a collimator 35 is disposed between a substrate 33 and the plasma 32. The collimator 35 is provided with a plurality of holes passing through the thickness direction of the collimator 35 in parallel. If the plasma 32 passes through the holes of the collimator 35, secondary electrons from the plasma 32 are trapped by the collimator 35. It is, thus, possible to prevent the dielectric breakdown of the gate oxide film 14 shown in FIGS. 1A through 1D from occurring.
If the collimate sputtering method is employed as shown in FIG. 3, a Ti film attaches to the collimator 35 and the diameter of the collimator 35 is decreased. Owing to this, it is necessary to correct film formation rate as the target is consumed, which disadvantageously makes maintenance difficult. Besides, due to the attachment of the Ti film onto the collimator 35, target consumption efficiency deteriorates thereby to push up production cost. They are grave disadvantages to the mass production of semiconductor devices. The collimate sputtering is originally designed to form a film on the bottom surface of a hole in a good coating state even if the aspect ratio indicating the depth of a hole formed in the surface of a substrate to the diameter of the hole is high. Considering the above, it is less advantageous to use the collimate sputtering in the step of forming a Ti film which does not require a high coating state.
In view of the mass production of semiconductor devices, it is desirable to form a Ti film for forming a Ti silicide film by using the normal sputtering method. If the normal sputtering method is actually employed, it is required to provide a method for manufacturing a semiconductor device without the dielectric breakdown of the gate insulating film 14.